TOC
Development and production:
The ATCA-PTSW-AMC4_RTM board is an xTCA[1] based module that follows the specifications presented in PICMG[2]® PhysRTM.0, Revision 1.0 Draft 0.1g that complements PICMG® 3.0, Revision 3.0[3] with respect to ARTM[4] specification.
The module acts as a passive External Host to ATCA Base carrier interface, providing the required electrical and logical connections, with status information.
The module main features are:
Figure 1 – ATCA-PTSW-AMC4_RTM Rear Transition Module block diagram and panel.
The RMC-TMG-1588 was developed as an external timing module add-on for the ATCA-PTSW-AMC4_RTM. Its main purpose is to generate the IRIG-B 100MHz clock and timecode signals for distribution to the ATCA-PTSW-AMC4 Front Board and, through the Front Boards’s FPGA CPS, to all system endpoints. CLK100MHz uses RTM TCLKA physical line and IRIG-B timecode uses TCLKD. The generated clock signals are synchronized with the IEEE-1588-2008 protocol, which core is implemented on the RMC-TMG-1588 local firmware. The module provides an RJ45 GbE connector where an external master clock unit should be connected. The IRIG-B clock and time code signals, as well as an auxiliary “pulse-per-second” (PPS) sync signal are made available at the external LEMO connectors. The overall scheme is presented on Figure 2.
Figure 2 – RMC-TMG-1588 module connectivity diagram and panel
File | Size | Date | Attached by | |||
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ATCA_PTSW_AMC4_RTM connectivity.png No description | 128.6 kB | 16:55, 4 Mar 2014 | jsousa | Actions | ||
RMC-TMG-1588.png No description | 31.8 kB | 17:16, 4 Mar 2014 | jsousa | Actions | ||
rtm16x.png No description | 457.95 kB | 19:03, 26 Mar 2014 | jsousa | Actions | ||
User Manual.pdf No description | 807.85 kB | 19:00, 19 Feb 2015 | jsousa | Actions |