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Page last modified 17:49, 17 Mar 2014 by ritacp
IPFN > CODAC > IPFN Instrumentation > Boards > FMC > FMC-AD-1Gx
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FMC-AD-1Gx

    TOC 

    1. 1. Datasheet
      1. 1.1. FMC-AD-1Gx Functional Block Diagram
      2. 1.2. Specifications

    Development and production:

    Datasheet

     

    • Dual channel 12-bit 1/1.6 GSPS A/D or Single channel 12-bit 2/3.2 GSPS A/D
    • FMC VITA 57.1 Compliant
    • AC or DC Coupling
    • Single-Ended or Differential input

     

    foto.png

     

    The FMC-AD-1Gx is a configurable mezzanine card compliant to the High-Pin-Count (HPC) VITA 57.1 standard, that provides either one 2.0/3.2 GSPS interleaved ADC or two 1.0/1.6 GSPS ADCs.  The card was designed to meet the processing needs of high-performance data acquisition applications in the nuclear fusion and is compliant to the AMC-MKX1 FMC carrier. The FMC-AD-1Gx analogue input channels can be configured as AC or DC coupled and single-ended or differential, as required by the specific application. The ADC sampling clock is provided by an in-board PLL, which is synchronized to a reference clock supplied by the local oscillator or by the carrier card through the HPC connector.

    FMC-AD-1Gx Functional Block Diagram

    diagram.jpg

     

    Specifications

     

     Channel Operation
    • Dual Channel

    12-bit A/D up to 1.6 GSPS
    • Single channel

    12-bit A/D up to 3.2 GSPS

     Memory
    • EEPROM for FRU hardware information

     Front Panel
    • 2  Single-Ended Lemo        

    EPL.00.250.DTN
    • 2 Diferencial Lemo 

    EPG.00.302.HLN

     Input Coupling
    • DC
    • AC
      • high-pass first order passive filter, fC= 3 kHz

     Input impedance
    • 50 ohm Single-Ended
    • 100 ohm Differential

     Input dynamic range

           (Full Scale)

    DC

    • ±200 mV

    AC

    • 400 mVpk-pk
     Input gain
    • Hardware configurable gain from 0 to 20 dB (PGA)
    • An additional -2.5 dB gain can be digitally configured (ADC)

     FMC HPC connector

     
    • High-pin-count VITA 57. 1 FMC site
      • 78 differential user defined pairs: 34 LA pair; 24 HA pair;  HB pairs
      • 2 differential clocks

     Mechanical

    • VITA 57.1 FMC High-Pin-Count (HPC) connector

     Clock Reference  Source
    • Internal clock source 50 MHz oscillator
    • External reference clock from HPC

     Electrical

     
    • +12 V mains source   
    • +3.3V IPMI
    • +2.5 V
    • +3.3V

     Testing and  development  interfaces
    • LEDs
    • Test points
    • Jumpers
    • ADC test patterns

     ADC compatibility
    • ADC10D1000 ( 10-bit @ 1GHz)
    • ADC12D1000( 12-bit @ 1GHz)
    • ADC10D1600 ( 10-bit @ 1.6GHz)
    • ADC12D1600( 12-bit @ 1.6GHz)

     VITA 57.1 compliant  carrier card

     
    • AMC-MKX1
      • Xilinx® Kintex™-7 FPGA;
      • 2048 + 256 MB DDR3 SDRAM
      • AMC.1 PCI Express: One  4x PCIe Gen2  link

     Applications
    • Data Acquisition Systems
    • LIDAR
    • RF Reflectrometry
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